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About aclk_sel field in i.MX6DQ.

Question asked by Keita Nagashima on Sep 11, 2015
Latest reply on Sep 13, 2015 by igorpadykov

Dear All,

 

Hello.

I found the difference of aclk_sel field between Reference manual and source code.

 

First, Refer to aCCM_CSCMR1 register in IMX6DQRM(Rev.3).

CCM_CSCMR1[aclk_sel]

00 derive clock from PLL2 PFD2

01 derive clock from pll3_sw_clk

10 derive clock from AXI

11 derive clock from PLL2 PFD0

 

Next, "_clk_emi_set_parent" function in arch\arm\mach-mx6\clock.c of jb4.2.2_1.1.0.

00 derive clock from AXI

01 derive clock from pll3_sw_clk

10 derive clock from PLL2 PFD2

11 derive clock from PLL2 PFD0

 

Which is right description?

 

Best Regards,

Keita

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