About aclk_sel field in i.MX6DQ.

[keitanagashima]

Dear All,

Hello.

I found the difference of aclk_sel field between Reference manual and source code.

First, Refer to aCCM_CSCMR1 register in IMX6DQRM(Rev.3).

CCM_CSCMR1[aclk_sel]

00 derive clock from PLL2 PFD2

01 derive clock from pll3_sw_clk

10 derive clock from AXI

11 derive clock from PLL2 PFD0

Next, "_clk_emi_set_parent" function in arch\arm\mach-mx6\clock.c of jb4.2.2_1.1.0.

00 derive clock from AXI

01 derive clock from pll3_sw_clk

10 derive clock from PLL2 PFD2

11 derive clock from PLL2 PFD0

Which is right description?

Best Regards,

Keita

[igorpadykov · Accepted solution]

HI Keita

right is RM, also these settings are used in latest 3.14.28 BSP clk-imx6q.c

(emi_sels)

linux-2.6-imx.git - Freescale i.MX Linux Tree

Best regards

igor

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