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Inline asm GCC vs. MW (e500v2)

Question asked by Juha Laukkanen on Sep 11, 2015
Latest reply on Sep 16, 2015 by Mathias Parnaudeau

There is following function


static uint32 u32SwapEndianness(register uint32 val)


    register uint32 ret = 0;


    asm volatile("rlwinm %0, %1, 24, 0,  31" : "=r"(ret) : "r"(val));

    asm volatile("rlwimi %0, %1, 8,  8,  15" : "=r"(ret) : "r"(val));

    asm volatile("rlwimi %0, %1, 8,  24, 31" : "=r"(ret) : "r"(val));


    return ret;



This generates different code with MW compiler and GCC compiler.


Below are instructions what MW emits. r31=ret, r03=val


li r31,0

rotrwi r31,r3,24

rlwimi r31,r3,8,8,15

inslwi r31,r3,8,24

mr r3,r31


So this very clean; how I excepted output to be.


Now then, below are instructions what GCC emits. r9=ret, r10=val


mr r9,r3

li r30,0

rotrwi r10,r9,24

mr r30,r10

rlwimi r10,r9,8,8,15

mr r30,r10

inslwi r9,r9,8,24

mr r30,r9


Now here first I don't understand why GCC uses weird swap/alias between r10/r30 and r9/r3. Not necessary, but not wrong.

Then the last instruction inslwi operands are wrong. Should be r10,r9...


GCC is 4.8.2 (gcc-4.8.2-Ee500v2-eabispe) and MW compiler is 4.3 build 278. Both supplied with CW 10.4. Gcc parameter '-Wa,-mregnames' used.