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iMX6DL : DDR3 CLK successive output

Question asked by koichi sakagami on Sep 2, 2015
Latest reply on Sep 2, 2015 by Yuri Muhin

Dear community,

 

We investigate a DDR3 clock quality for JEDEC clock jitter test.
We need to output the DDR3 clock continuously .

 

We executed the " mtest command " on uboot.
However the clock became the intermittent output.

 

Question.
What kind of method can we output the DDR3 clock in continuously ?

 

Best Regards,
Koichi Sakagami

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