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As any processor the T2080 should start from some predefined address which is known to the system designer. The T2080 reference manual available on the Freescale site provides more details about boot. It says
“When each core comes out of reset, its MMU has one 4 KB page defined at 0x0_FFFF_Fnnn. Each core begins execution with the instruction at effective address 0x0_FFFF_FFFC. To get this instruction, the core's first instruction fetch is a burst read of boot code from effective address 0x0_FFFF_FFC0.”
Notice it is not bounded to the NOR flash as boot device, it is just the core feature.
By default this access goes to the special boot window (8 MB at 0x0_FF80_0000 to 0x0_FFFF_FFFF) which like the local access windows (LAW) maps this region of the local address space to a specified target interface. The boot window target interface is defined in the reset configuration word (RCW[BOOT_LOC]). It could be IFC or for example PCIe. When IFC is the boot target the RCW[IFC_MODE] selects which device connected to the IFC is boot memory.
For systems in which the boot code resides at a different address, the chip provides boot space translation capability. The RCW is read by Pre-Boot loader (PBL). The PBL also can enable boot space translation, (or the boot space translation can be set up by an external host when the device is configured to be in boot holdoff mode). If translation is to be performed to a page outside the default boot window (8 MB at 0x0_FF80_0000 to 0x0_FFFF_FFFF), the external host or pre-boot loader must then also set up the target ID defining the target destination.
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