capture_LDD-result

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capture_LDD-result

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1,642 Views
vijenad
Contributor III

I used same example code to capture period.

In debug mode, I was reading expression - data, I was able to see Hex value there

Can you help me to understand, how to relate this hex value with the Frequency fed at the input pin

and

how to configure the same value in PPG bean to get the same frequency at the output pin

LDD_TDeviceData *MyCap1Ptr;

LDD_TError Error;

uint32_t Data;

int main(void)

/*lint -restore Enable MISRA rule (6.3) checking. */

{

  /* Write your local variable definition here */

  /*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/

  PE_low_level_init();

  /*** End of Processor Expert internal initialization.                    ***/

  MyCap1Ptr = Cap1_Init((LDD_TUserData *)NULL);        /* Initialize the device */

  Error = Cap1_Reset(MyCap1Ptr);                       /* Reset the counter */

  /* Write your code here */

  /* For example: for(;;) { } */

  for(;;)

  {

   //Cap1_GetCaptureValue();

   if ((Cap1_GetEventStatus(MyCap1Ptr) & LDD_CAPTURE_ON_CAPTURE) != 0U) { /* Get input capture status */

         /* Write captured value to variable Data */

         Error = Cap1_GetCaptureValue(MyCap1Ptr, &Data);

         /* Variable Data contains captured value of a timer */

   }

  }

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1 Solution
1,243 Views
marek_neuzil
NXP Employee
NXP Employee

Hello,

The Capture component (capture functionality of the timer - FTM/TPM) allows measure of signals period (e.g. rising edge to rising edge).

The counter counts in free run mode (from internal CPU clock and overflows at maximum timer range). On the selected edge of the input signal (on the input pin), the current content of the counter register is written into the capture register and the OnCapture event is called. Counter overflow (i.e. when counter register's value goes over the "Maximal time" property value) is signalized by calling the OnOverflow event (if supported). Overflow can be detected only if interrupt/events are enabled. In polling mode the component has no information about overflow.

Therefore the measured period of the signal (e.g. rising edge to rising edge) is equal to difference of the captured values (number of ticks of the counter).

For example you can do:

int main(void)

/*lint -restore Enable MISRA rule (6.3) checking. */

{

  /* Write your local variable definition here */

  uint16_t Data[2];

  uint16_t Period;

  uint8_t index = 0;

  uint8_t err;

  /*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/

  PE_low_level_init();

  /*** End of Processor Expert internal initialization.                    ***/

  /* Write your code here */

  Cap1_Reset(); /* reset the counter */

  do { /* infinite loop */

      if (Cap1_GetStatus()) { /* get input capture status */

        /* Write captured value to variable Data */

        err = Cap1_GetCaptureValue(&Data[index]);

        index++;

        /* variable Data[index] contains captured value of a timer */

      }

    } while (index < 2);

   Period = Data[1] - Data[0];

  . . .

Please note, that this example is simplified and does not solve the overflow of the timer.

The Period variable contains the number of ticks of the timer per period of the signal. When you use the timer with the same period (timer clock source frequency) and write the measured period (the Period variable) into the modulo register of the timer you can generate the PWM signal with the same period (in the edge aligned mode of the PWM; center aligned PWM period is different,  you must use Period/2 value ).

The PPG component does not support direct access to the modulo register. Therefore you must either modify a method for setting the period or you must compute the period in sec (the period in seconds value = Period * <period of the timer clock>) and use the SetPeriodReal() method to set the period.

Best Regards,

Marek Neuzil

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4 Replies
921 Views
pabloresio
Contributor I

That code is all misspelled

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924 Views
pabloresio
Contributor I

That code is all misspelled

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1,244 Views
marek_neuzil
NXP Employee
NXP Employee

Hello,

The Capture component (capture functionality of the timer - FTM/TPM) allows measure of signals period (e.g. rising edge to rising edge).

The counter counts in free run mode (from internal CPU clock and overflows at maximum timer range). On the selected edge of the input signal (on the input pin), the current content of the counter register is written into the capture register and the OnCapture event is called. Counter overflow (i.e. when counter register's value goes over the "Maximal time" property value) is signalized by calling the OnOverflow event (if supported). Overflow can be detected only if interrupt/events are enabled. In polling mode the component has no information about overflow.

Therefore the measured period of the signal (e.g. rising edge to rising edge) is equal to difference of the captured values (number of ticks of the counter).

For example you can do:

int main(void)

/*lint -restore Enable MISRA rule (6.3) checking. */

{

  /* Write your local variable definition here */

  uint16_t Data[2];

  uint16_t Period;

  uint8_t index = 0;

  uint8_t err;

  /*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/

  PE_low_level_init();

  /*** End of Processor Expert internal initialization.                    ***/

  /* Write your code here */

  Cap1_Reset(); /* reset the counter */

  do { /* infinite loop */

      if (Cap1_GetStatus()) { /* get input capture status */

        /* Write captured value to variable Data */

        err = Cap1_GetCaptureValue(&Data[index]);

        index++;

        /* variable Data[index] contains captured value of a timer */

      }

    } while (index < 2);

   Period = Data[1] - Data[0];

  . . .

Please note, that this example is simplified and does not solve the overflow of the timer.

The Period variable contains the number of ticks of the timer per period of the signal. When you use the timer with the same period (timer clock source frequency) and write the measured period (the Period variable) into the modulo register of the timer you can generate the PWM signal with the same period (in the edge aligned mode of the PWM; center aligned PWM period is different,  you must use Period/2 value ).

The PPG component does not support direct access to the modulo register. Therefore you must either modify a method for setting the period or you must compute the period in sec (the period in seconds value = Period * <period of the timer clock>) and use the SetPeriodReal() method to set the period.

Best Regards,

Marek Neuzil

1,243 Views
vijenad
Contributor III

Thanks Marek,

It was very helpful.

I guess, at the time of counter overflow, Data[1] will be less that Data[0], it may lead to erratic value.

So do we need to come up with an condition

if Data[1] > Data[0], then Period = Data[1] - Data[0].

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