I refer to the following URL.
Reference URL: https://community.freescale.com/thread/306801
I set a frequency of 29.5 MHz for the PLL5 LVDS clock signal on Yocto 126.96.36.199.0.2, the value is close to 29.5 MHz by oscilloscope.
But the clock rate value of pll5 video is close 206.5 MHz on console log.
# cat /sys/kernel/debug/clk/osc/pll5_video/pll5_post_div/pll5_video_div/clk_rate
# cat /sys/kernel/debug/clk/osc/pll5_video/pll5_post_div/pll5_video_div/ldb_di0_sel/clk_rate
Can you tell me why reading clock rate value and the actual measured value are difference?