Dear chip experts,
According to the SPF-27392_C4.pdf schematics, I tried to replace VGEN5 supply with optional LDO.
This LDO meets the additional current requirement but I worry about the startup timing.
- Is there any timing restrictions for LDO startup like VGEN5 startup sequece?
- If yes, in order to meet the timing, is it OK to input VGEN5 to the LDO pin5(SHDN*) instead of SYS_4V2?
- Does this option circuit already comfirmed and it worked if R32(0 ohrm) mounted ?
Can anybody help me?