JASMIN GOUPIL

PLL error with a bad Reset

Discussion created by JASMIN GOUPIL on Dec 21, 2007
Latest reply on Jan 10, 2008 by JASMIN GOUPIL
If the vcc drop to 1.25V on my PCB de LVD do a reset but the PLL timing is wrong after the reset.
The timing for UART is corrupt.

Wath is the register corrupt the PLL on bad reset.

Jasmin.

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