MPC5644A CAN ID FILTER

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MPC5644A CAN ID FILTER

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Contributor III

How to filter the can id in the MPC5644A?How can i to set the register?

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martin_kovar
NXP Employee
NXP Employee

Hi,

There are two possibilities for masking. MBFEN bit in MCR register determines, which masking mode is in use. There is a legacy mode where one register is used for masking all message buffers except MB14 and 15. Or there is individual Rx masking through RXIMR0-RXIMR63.

These registers are used as acceptance masks for ID filtering in Rx message buffers and the FIFO. If the

FIFO is not enabled, one mask register is provided for each available Message Buffer, providing ID

masking capability on a per Message Buffer basis. When the FIFO is enabled (MCR[FEN] is set), the first

eight Mask Registers apply to the eight elements of the FIFO filter table (on a one-to-one correspondence), while the rest of the registers apply to the regular message buffers, starting from MB8.

At first set MCR.MBFEN to 1.

Then, if you want to use message buffer0 (FIFO must be disabled) for example, you have to set RXIMR0. Second important point is using standard or extended ID.

If you set the bit in RXIMR register to 0, then the receiving bit is “don’t care”. If you set the bit in RXIMR register to 1, then the bit in the filter is checked against the one received.

For example if you use standard ID and you want to receive to MB0 IDs from 0 to 15 then you set:

RXIMR0 = 0x1FC3FFFF

Or if you use extended ID and you want to receive to MB0 IDs from 0 to 16 then you set:

RXIMR0 = 0x1FFFFFF0

Regards,

Martin

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448 Views
martin_kovar
NXP Employee
NXP Employee

Hi,

There are two possibilities for masking. MBFEN bit in MCR register determines, which masking mode is in use. There is a legacy mode where one register is used for masking all message buffers except MB14 and 15. Or there is individual Rx masking through RXIMR0-RXIMR63.

These registers are used as acceptance masks for ID filtering in Rx message buffers and the FIFO. If the

FIFO is not enabled, one mask register is provided for each available Message Buffer, providing ID

masking capability on a per Message Buffer basis. When the FIFO is enabled (MCR[FEN] is set), the first

eight Mask Registers apply to the eight elements of the FIFO filter table (on a one-to-one correspondence), while the rest of the registers apply to the regular message buffers, starting from MB8.

At first set MCR.MBFEN to 1.

Then, if you want to use message buffer0 (FIFO must be disabled) for example, you have to set RXIMR0. Second important point is using standard or extended ID.

If you set the bit in RXIMR register to 0, then the receiving bit is “don’t care”. If you set the bit in RXIMR register to 1, then the bit in the filter is checked against the one received.

For example if you use standard ID and you want to receive to MB0 IDs from 0 to 15 then you set:

RXIMR0 = 0x1FC3FFFF

Or if you use extended ID and you want to receive to MB0 IDs from 0 to 16 then you set:

RXIMR0 = 0x1FFFFFF0

Regards,

Martin

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