IMX6 DDR3 changes for FLY BY Topology(Vert Urgent)

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IMX6 DDR3 changes for FLY BY Topology(Vert Urgent)

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kirtibadkundri
Contributor I

Hi all,

    We need urgent help from all experts. We want to do the validation for IMX6q_sabre.... with Fly-by Topology.

We need to change the register values for mmdc for offset value 0x818, 0x808, 0x800 and 0x1c.

We tried to make these changes in  flash_header.S, these changes are for Fly-by Topology.

Please let me know, how to change the values and its correct to change in flash_header.S.

Its very urgent.... any FreeScale expert can help here.

Regards

KirtiKrishna Badkundri

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igorpadykov
NXP Employee
NXP Employee

Hi Kirti

one can look at flash header for arm2 board (in uboot /mx6q_arm2  folder),

it is attached.

Best regards

igor

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kirtibadkundri
Contributor I

Thanks Biyong Sun and igorpadykov,

          But still my problem is not resolved. We are not able to make the necessary changes required for FLYBY Topolgoy for Freescale IMX6q_Sabre.

Also, whether we need to make Kernel changes apart form u-boot changes for DDR3, writeleveling and MMDc

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BiyongSUN
NXP Employee
NXP Employee

Write leveling or on is in the uboot DCDC.

The DDR stress test tool wil help you to generate the parameters.

The DDR stress test not only does the stress test, but does the calibration as well.

The difference of those two layout are the length of the lines.

Just let the DDR stress test tool know the toplogy. It will caculate a correct parameters.

This is long and basic topic. You just follow the DDR stress test tool guide.

Have you even try DDR stress test tool.

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igorpadykov
NXP Employee
NXP Employee

Hi Kirti

if you are trying to use IMX6q sabre reference board, then it is not

possible to use it with "FLYBY Topolgoy", becasue it was not routed

according to flyby rules. arm2 board was designed with flyby rules.

So you should create own custom board and route it with flyby  topology rules.

Kernel changes are not needed.

From i.MX6 System Development User’s Guide (rev.1, 6/2013)

sect.3.5.3 DDR3 (64 bits) Fly-by topology considerations :

Pay attention to the following recommendations when the Fly-by topology and routing technique.

• DDR controller provides address mirroring when using two chip selects, which aids address line

routing for memories on both sides of board.

• Bus termination resistors are required.

http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf

Best regards

igor

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BiyongSUN
NXP Employee
NXP Employee

i.MX6 DDR Stress Test Tool V1.0.3

When running DDR Stress test please  choose write leveling is for fly-by.

Freescale i.MX6 DRAM Port Application Guide-DDR3

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