Hello everyone, I have just started working on a T4240 QDS board. At first it wasn't giving me either a Yocto linux or UBoot command line, so I set the DIP switches to the "default" position in the quick-start guide, forgetting to save the original settings. Now I have the board failing in the U-boot sequence immediately after detecting the DDR3 ram ("Waiting for D_INIT timeout. Memory may not work."). Any suggestions for which settings to change?
Solved! Go to Solution.
Please try to change in the default settings only SW1 to 0x17 - to get RCW from NOR Flash.
Hello,
Please provide the U-Boot booting log.
What are all on-board inscriptions and markings?
Do you have set the configuration switches as follows?
SW1= 0x24 SW2= 0xfe SW3= 0x00 SW4= 0x50 SW9= 0x1f
SW5= 0xe2 SW6= 0x0f SW7= 0xfa SW8= 0xcd
Currently my settings are:
sw1: 0x24 sw2: 0xFF sw3: 0x18 sw4: 0x50 sw5: 0xE2 sw6: 0x0F sw7: 0xFA sw8: 0xCF sw9: 0x1F
With these settings, I get this at boot on the serial console:
U-Boot 2013.10-00403-g281afa2 (Nov 28 2013 - 13:18:35)
CPU0: T4240E, Version: 2.0, (0x82480020)
Core: e6500, Version: 2.0, (0x80400120)
Clock Configuration:
CPU0:2083.333 MHz, CPU1:2083.333 MHz, CPU2:2083.333 MHz, CPU3:2083.333 MHz,
CPU4:2083.333 MHz, CPU5:2083.333 MHz, CPU6:2083.333 MHz, CPU7:2083.333 MHz,
CPU8:2083.333 MHz, CPU9:2083.333 MHz, CPU10:2083.333 MHz, CPU11:2083.333 MHz,
CCB:833.333 MHz,
DDR:852.516 MHz (1705.033 MT/s data rate) (Asynchronous), IFC:208.333 MHz
FMAN1: 555.556 MHz
FMAN2: 416.667 MHz
QMAN: 416.667 MHz
PME: 416.667 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word (RCW):
00000000: 14180019 0c101914 00000000 00000000
00000010: 04383063 30548c00 1c020000 1d000000
00000020: 00000000 ee0000ee 00000000 000307fc
00000030: 00000000 00000000 00000000 00000020
Board: T4240QDS, Sys ID: 0x1e, Sys Ver: 0x26, vBank: 0
FPGA: v3 (T4240QDS_2012_1113_1114), build 438 on Tue Nov 13 17:14:23 2012
SERDES Reference Clocks: SERDES1=125MHz SERDES2=125MHz SERDES3=100MHz SERDES4=100MHz
I2C: ready
SPI: ready
DRAM: Initializing....using SPD
Detected UDIMM 9JSF25672AZ-2G1KZ
Detected UDIMM 9JSF25672AZ-2G1KZ
Detected UDIMM 9JSF25672AZ-2G1KZ
Waiting for D_INIT timeout. Memory may not work.
Waiting for D_INIT timeout. Memory may not work.
Waiting for D_INIT timeout. Memory may not work.
4 GiB left unmapped
With the default settings from the quick start guide (the ones you give), I get no serial output at boot.
Correction, I was looking at the DCM, which of course, being disabled, gave no output...
Booting with the default settings (SW1= 0x24 SW2= 0xfe SW3= 0x00 SW4= 0x50 SW9= 0x1f SW5= 0xe2 SW6= 0x0f SW7= 0xfa SW8= 0xcd)
gave the following serial console output:
U-Boot 2013.10-00403-g281afa2 (Nov 28 2013 - 13:18:35)
CPU0: T4240E, Version: 2.0, (0x82480020)
Core: e6500, Version: 2.0, (0x80400120)
Clock Configuration:
CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz, CPU3:1666.667 MHz,
CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz, CPU7:1666.667 MHz,
CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz, CPU11:1666.667 MHz,
CCB:666.667 MHz,
DDR:1600 MHz (3200 MT/s data rate) (Asynchronous), IFC:166.667 MHz
FMAN1: 444.444 MHz
FMAN2: 333.333 MHz
QMAN: 333.333 MHz
PME: 333.333 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word (RCW):
00000000: 14180019 0c101914 00000000 00000000
00000010: 04383063 30548c00 1c020000 1d000000
00000020: 00000000 ee0000ee 00000000 000307fc
00000030: 00000000 00000000 00000000 00000020
Board: T4240QDS, Sys ID: 0x1e, Sys Ver: 0x26, vBank: 0
FPGA: v3 (T4240QDS_2012_1113_1114), build 438 on Tue Nov 13 17:14:23 2012
SERDES Reference Clocks: SERDES1=125MHz SERDES2=125MHz SERDES3=100MHz SERDES4=100MHz
I2C: ready
SPI: ready
DRAM: Initializing....using SPD
Detected UDIMM 9JSF25672AZ-2G1KZ
DDR clock (MCLK cycle 625 ps) is faster than the slowest DIMM(s) (tCKmin 938 ps) can support.
The choosen cas latency 37 is too large
Detected UDIMM 9JSF25672AZ-2G1KZ
DDR clock (MCLK cycle 625 ps) is faster than the slowest DIMM(s) (tCKmin 938 ps) can support.
The choosen cas latency 37 is too large
Detected UDIMM 9JSF25672AZ-2G1KZ
DDR clock (MCLK cycle 625 ps) is faster than the slowest DIMM(s) (tCKmin 938 ps) can support.
The choosen cas latency 37 is too large
Error: board specific timing not found for data rate 3199 MT/s
Trying to use the highest speed (2140) parameters
Error: board specific timing not found for data rate 3199 MT/s
Trying to use the highest speed (2140) parameters
Error: board specific timing not found for data rate 3199 MT/s
Trying to use the highest speed (2140) parameters
Error: WRREC doesn't support more than 16 clocks
Warning: CWL is out of range
Error: unsupported write recovery for mode register wr_mclk = 24
Error: unsupported cas latency for mode register
Warning: CWL is out of range
Error: WRREC doesn't support more than 16 clocks
Warning: CWL is out of range
Error: unsupported write recovery for mode register wr_mclk = 24
Error: unsupported cas latency for mode register
Warning: CWL is out of range
Error: WRREC doesn't support more than 16 clocks
Warning: CWL is out of range
Error: unsupported write recovery for mode register wr_mclk = 24
Error: unsupported cas latency for mode register
Warning: CWL is out of range
Waiting for D_INIT timeout. Memory may not work.
Waiting for D_INIT timeout. Memory may not work.
Waiting for D_INIT timeout. Memory may not work.
4
Please try to change in the default settings only SW1 to 0x17 - to get RCW from NOR Flash.
Thanks, that did the trick.
Please try using rcw + uboot for latest Freescale SDK, which is SDK 1.8.
Adrian
Hi Adrian,
I don't see how I can try your suggestion (assuming I understand it). Won't I need to boot to a prompt to be able to load this RCW and uboot? My problem is I can't boot the board in the first place. I'm probably not understanding you - can you tell me how to do this or point me at a manual that explains it?
Thanks,
Colin
You could use CodeWarrior to flash images to NOR, even the board is not booting. But, seems Fedor ask your question and your board is up and running.
Adrian
I will check when I get home, where the system is. Unfortunately I'm on the road Today.