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Maintaining FreeRTOS tick interrupt frequency / Systick while switching clock configurations

Question asked by Andrew Warner on Aug 8, 2015
Latest reply on Aug 14, 2015 by soledad

Hi all,

 

I am working on a project built on a KL17 with FreeRTOS and I'm running into an issue with clock configurations - so I was hoping someone here could help point me in the right direction. I am using Kinetis Design Studio 3.0 with PEx and the KSDK 2.0.

 

I need to switch between two clock speeds during runtime (to allow the processor to go into VLP mode between periodic tasks) - from 48MHz to 2MHz core clock. To do this, I am using the fsl_clock_manager's CLOCK_SYS_SetConfiguration function along with two clock_manager_user_config_t structures. (On a side note, I am using configurations defined in my own code, as I also need to make use of the asynchronous 32KHz RTC_CLKIN - the configuration structures generated by PEx do not include the .simConfig.er32kSrc = 2U properties needed to keep the RTC_CLKIN active between configuration changes - not sure if I'm just missing a setting for this somewhere or if it isn't possible at this time).

 

Switching between clock configurations and power modes is working fine, but I'm running into an issue where the FreeRTOS Tick, as well as the PIT, "runs slow" while the 2MHz clock configuration is active. While I can't be sure, it seems intuitive to me that the issue is simply that the CLOCK_SYS_SetConfiguration function does not update whatever prescaler or interval is used to generate the sysTick, thus everything relying on it runs 24 times slower. At this point I have to admit I don't know enough about FreeRTOS or the sysTick yet to to know how to adjust this while the code is running.

 

Any help would be appreciated, thank you!

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