After solving another problem on arbitration loss detection for Kinetis I2C modules, I am stuck with a very serious problem.
I am writing an I2C low level driver for multimaster operation in a FRDM-K64F board, and to test it I am emulating data collisions using another K64 board, through "bit-bang" approach. The emulation board works nice, it tests all conditions I want to test.
First, I keep flooding the bus with repeated start data until I press a button to release the bus, forcing my driver to wait for the bus release to send its data. This is working fine.
Then, it waits for my driver to issue a START and then sends data to the same ID (and EEPROM sharing the same bus), but the first data byte of my emulating board has higher priority, and so my driver has to detect arbitration loss and let the emulator finish its transfer. It also works fine.
The final test is the problem: the emulator waits for the START again, and then sends the slave ID of my driver (0x20), which has higher priority than the ID that the driver is sending (0x50 for the EEPROM). Thus, the driver should recognize bôth arbitration loss and slave ID match. Both conditions are recognized at the respective flags in the Status register, but when I try to clear the TX bit at the Control 1 register (I2C1_C1) to put the module in receive state, it locks the SDA line to Low. I should not happen, I would understand that it could lock if I was changing from RX to TX, but not the opposite way.
I don't know what wrong I am doing. Any clues?
Thanks in advance,