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Non burst DMA from EIM to host memory

Question asked by Takatoshi Yamaoka on Aug 4, 2015
Latest reply on Aug 4, 2015 by Yuri Muhin

I want to control i.MX6's SDMA  like following.

 

Two device is connected on EIM.

 

SDMA.png
one FPGA works as a bus bridge between EIM and low-speed interface. It receive bulk data from low-speed interface intermittently.

 

I want to use SDMA for low-speed interface to reduce CPU workload. But FPGA does not have a FIFO memory. It can receive only 1 byte. So SDMA speed is limited by low-speed interface. I am afraid of bus busy by burst DMA with low-speed interface.

 

I have three questions.
1. Can I change burst size of SDMA for EIM?

2. Can I use peripheral DMA for EIM devices?

3. Can FPGA control SDMA access by changing a level of SDMA_EXT_EVENT after SDMA is triggerd?

 

Best Regards,
Yamaoka

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