AnsweredAssumed Answered

i.MX6DQ DDR parameters (tIS, tsr).

Question asked by Satoshi Shimoda on Aug 5, 2015
Latest reply on Aug 24, 2015 by igorpadykov

Hi community,

 

Our partner have some questions about i.MX6DQ DDR parameter.

Please see their questions as below.

 

[Q1]

Please see Table 42 of IMX6DQCEC Rev.4, they want to know the condition to apply DDR4 and DDR6 parameter.

When set drive impedance to largest value, in other words when wafeform becomes degrade and tsr value is smallest, DDR4 satisfies 500ps (min) also?

If not, would you let us know the drive impedance and the tsr (max, min) value to satisfy tIS=500ps (min)?

 

[Q2]

Please see Table 30 in IMX6DQCEC Rev.4, tsr value is shown as the condition Drive impedance = 34 ohm.

However, i.MX6DQ can set the drive impedance to other values as following in IMX6DQRM Rev.3 (e.g. chapter 36.4.463)

  240 ohm, 120 ohm, 80 ohm, 60 ohm, 48 ohm, 40 ohm

So would you let me know the tsr value when drive impedance is set to the above values also?

 

 

Best Regards,

Satoshi Shimoda

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