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K64 MDC seems to be inverted

Question asked by Roger Chaplin on Aug 3, 2015
Latest reply on Aug 9, 2015 by Hui_Ma

I'm having trouble bringing up Ethernet in my design. It uses the MK64FN1M0VLQ12 and a Micrel KSZ8081 PHY. I have an interactive shell on a serial port and I added commands to peek, poke, and dump PHY registers. I can't seem to write PHY registers.


I used a scope to look at MDC and MDIO while peeking register 0, picture is attached. It looks like the K64 is changing MDIO on the rising edge of MDC, and not on the falling edge as it ought to be. The cursors on the scope trace show the MDIO is technically meeting the hold time spec: the KSZ8081 needs 4ns and I'm getting 16ns. But this just looks wrong.


There's nothing Ethernet related in the latest errata for this part (1N83J). Can somebody help me figure out what's going on? Thanks.