About the amplitude of FEC_TX_CLK(REF_CLK) on i.MX25 FEC

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About the amplitude of FEC_TX_CLK(REF_CLK) on i.MX25 FEC

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yuuki
Senior Contributor II

Dear all,

We use i.MX257 in our system.
And the RMII I/F of i.MX25 is used.

When Drive Strength on the device side is made small, the amplitude of FEC_TX_CLK(REF_CLK) becomes the 4Vpp degree.
When Drive Strength on the device side is made big, the amplitude of FEC_TX_CLK becomes the 5.2Vpp degree.

We want to know the amplitude range that FEC_TX_CLK can allow.
(Min/Max Value)

May I have advice?

Best Regards,
Yuuki

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Yuri
NXP Employee
NXP Employee

  Strictly speaking, over-/under-shoots are not specified for i.MX25.
Nevertheless,  customers can be oriented on the following :

  Overshoot and undershoot conditions (transitions above OVDD and below GND)
on switching pads must be held below 0.6 V, and the duration of the overshoot/undershoot
must not exceed 10% of the system clock cycle. Overshoot/ undershoot must be controlled
through printed circuit board layout, transmission line impedance matching, signal line termination,
or other methods. Non-compliance to this specification may affect device reliability or cause permanent
damage to the device.

Regards,

Yuri.

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Yuri
NXP Employee
NXP Employee

   It is needed to select drive strength (output impedance of source should match

input impedance of  receiver) properly for high frequency signals to avoid

glitches on signals edges.


Have a great day,
Yuri

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yuuki
Senior Contributor II

Dear Yuri-san,

Thank you for your support.

We changed DriveStrength of CLK of EtherPHY.
(This CLK's amplitude  changes from 4Vpp to 5.2Vpp.)

We want to know the amplitude range that FEC_TX_CLK(i.MX's pin) receiving this CLK signal can allow.

Best Regards,
Yuuki

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592 Views
Yuri
NXP Employee
NXP Employee

  Strictly speaking, over-/under-shoots are not specified for i.MX25.
Nevertheless,  customers can be oriented on the following :

  Overshoot and undershoot conditions (transitions above OVDD and below GND)
on switching pads must be held below 0.6 V, and the duration of the overshoot/undershoot
must not exceed 10% of the system clock cycle. Overshoot/ undershoot must be controlled
through printed circuit board layout, transmission line impedance matching, signal line termination,
or other methods. Non-compliance to this specification may affect device reliability or cause permanent
damage to the device.

Regards,

Yuri.

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