If you see OMAP processors from TI, there is a mode called SAFE_MODE other than the modes supported by the particular PAD control register.
As quoted, the safe_mode in OMAP "avoids any risk of electrical contention by configuring the pin as an input with no functional interface mapped to it. The safe mode is used mainly as the default mode for all pins containing no mandatory interface at the release of power-on reset." Is similar kind of functionality available in i.MX processors.
Vijai Kumar K