I have question about using LVDS output.
1.When I use LVDS output, do I need any register settings of IPU ?
If yes, please let me know the register.
2.I'm watching both a figure37-39 and figure39-1.
In my understanding, DI's output is connected to LDB input such as lcdif1_data, lcdif1_hsync, lcdif1_vsync, lcdif1_enable, lcdif1_reset and lcdif1_clk.
If my understanding is correct, please tell me knoe the connection of each port.
3.Does LVDS_TXx and LVDS_CLK are made from Parallel Interface Data Synchronizer'DATA and Timing Generator'DISP_CLK ?
4.Let me confirm about IPUx_DI0_GENERAL register's discription.
The discription includes following signal that like external pins.
Are these pins internal signal?
IPU_DI0_GENERAL bit22 IPP_PIN_2
IPU_DI0_GENERAL bit21 External VSYNC
IPU_DI0_GENERAL bit20 External CLOCK
IPU_DI0_GENERAL bit17 Output Clock
IPU_DI0_GENERAL bit7:0 di0_polarity_i_1