AnsweredAssumed Answered

Secure and Non-secure address spaces

Question asked by moha on Jul 20, 2015
Latest reply on Jul 28, 2015 by moha

Hi,

 

I use the SABRE SD board (with iMX6Q cpu).

 

I run a bare metal application with one part running on the secure world and one in the normal world.

My goal is to define a secure memory region in the external RAM that cannot be accessed by the normal world.

 

For that I use the NS-bit in the translation table descriptor to define separate Secure and Non-secure address spaces.

 

When the secure memory region is made of 7 sections of 1 MB each the behavior is correct :

There are two separate address spaces.

When the normal world accesses (read/write) the same physical addresses as the secure memory region the normal world does not access the secure memory region data.

 

But if I add an additional 250 MB space to the secure memory region it seems there is then only one address space :

The normal world access (read and modify) the secure memory region data !!

 

Is this the expected behavior ?

Is there a limit for size of the secure memory ? how to retrieve this limit ? is it configurable ?

 

Thanks in advance for your help.

Moha

 

 

Outcomes