In our project ethernet throughput test we get a result RX/TX 415/165 Mbit/s, it is definitely large than the 400M limitation as in the fsl imx6dl chip errata.
And also as described in the errata docu:
So, is our project in normal state, or if it is not, how to fix it, in other words how to enable pause frame.
And please give us a clear value about imx6dl ENET throughput performance:
single RX and single TX maximum performance, and also RX+TX total performance.