AnsweredAssumed Answered

P1016 DDR ECC testing

Question asked by PaulWalker on Jul 20, 2015
Latest reply on Jul 30, 2015 by Bulat Karymov

I am trying to test out DDR ECC on a P1016 based board.

 

I single-bit error scenarios all seems ok - the DDR_ERR_SBE register happily counts the error occurences.

 

When inducing multi-bit errors, I expected a machine check exception. However the core just seems to hang.

 

Processor set-up bascally as below.

IVOR1 installed

HID1[RFXE]=1

DDR_ERR_DISABLE = 0

DDR_DDR_SDRAM_CFG[ECC_EN] = 1

 

Mulit-bit error injection

DDR_ERR_INJECT[EIEN] = 1

DDR_DATA_ERR_INJECT_HI = 0x00000003

 

  {processor hangs}

 

All seems to align with E500 and P1025 reference manual.

 

Am I doing something wrong?

Outcomes