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Occur Default handler when start Init Uart

Question asked by noah kwon on Jul 17, 2015
Latest reply on Jul 20, 2015 by Alice_Yang

hi, guys. I'm begginer in freescale.

 

actually, I didn't even know that what the problem is in this code.

I think that is default handler.

 

when I was coding for uart driver I got a problem about default handler.

 

Maybe I know that picture of bottom is occured exception and next bottom is main code.

 

I already got many solutions for this issue on this community. but, I couldn't do that

 

I guess that issue is related Clock Gating.. whatever

 

this board is FRDM-K64F

 

nobody know that issue... TT so, if anybody know that problem.... help me...

 

thank you.

 

Noah.

 

default handler_1.png

 

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#include "Cpu.h"
#include "Events.h"
#include "clockMan1.h"
#include "pin_init.h"
#include "osa1.h"

#include "Drv_UART.h"
#if CPU_INIT_CONFIG
  #include "Init_Config.h"
#endif

#define REG_RW(x) (volatile uint32_t *)(x)

 

int main(void)
{
      PE_low_level_init();

     Init_Uart(4,50000000,115200);

 

     #ifdef PEX_RTOS_START
      PEX_RTOS_START();
      #endif

     for(;;){}

}

 

void Init_Uart(char ch ,int SysClk, int Baud)
{


      int mReg,ubd;

     *REG_RW(SIM_SCGC1) |= 0x1 << 10;                                               // Enable the clock to the selected UART

 

     mReg = *REG_RW(UART4_C2);                                                          // Tx, Rx are disabled
      mReg = (mReg & ~(0x1 << 2)) | (0x0 << 2);
      mReg = (mReg & ~(0x1 << 3)) | (0x0 << 3);
      *REG_RW(UART4_C2) = mReg;

 

     *REG_RW(UART4_C1) = 0;                                                                 // all default settings

 

     ubd = (uint32_t)((SysClk)/(Baud*16));                                                   // Calculate Baud Settings

 

     mReg = *REG_RW(UART4_BDH);
      *REG_RW(UART4_BDH) = (mReg & ~(0x1F << 0)) | (ubd >> 8);       // BDH
      *REG_RW(UART4_BDL) = (uint8_t)(ubd & 0xff);                                // BDL

 

     mReg = *REG_RW(UART4_C4);                                                        // BRFA
      mReg = (mReg & ~(0x1F << 0)) | (0x1 << 2);
      *REG_RW(UART4_C4) = mReg;

 

     mReg = *REG_RW(UART4_C2);                                                         // Tx, Rx are enabled
      mReg = (mReg & ~(0x1 << 2)) | (0x1 << 2);
      mReg = (mReg & ~(0x1 << 3)) | (0x1 << 3);
      *REG_RW(UART4_C2) = mReg;

 

     mReg = *REG_RW(UART4_S2);                                                           // Most Significant Bit First
      mReg = (mReg & ~(0x1 << 5)) | (0x0 << 0);
      *REG_RW(UART4_S2) = mReg;
}

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