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Please provide me the power up sequence timing diagram for the BSC9131

Question asked by manjanagouda patil on Jul 14, 2015
Latest reply on Jul 16, 2015 by Serguei Podiatchev

Hi

Please provide me the power up  sequencing timing diagram for BSC9131. In datasheet it is mentioned all power should be stable within 50ms,

According to datasheet

Power Sequencing

The device requires its power rails to be applied in a specific sequence in order to ensure proper device operation. These

requirements are as follows for power up:

1. VDD, VDDC, AVDD (all PLL supplies)

2. LVDD, BVDD, CVDD, OVDD, X1VDD, X2VDD, GVDD

how much delay should be provided between 1 and 2 group.

Thanks

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