mx6q IPU problem

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mx6q IPU problem

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mrleo
Contributor IV

Hi all,

I  have a question about ipu my not understand. My custom board is mx6dl board and run android 4.2 system.

pastedImage_1.png

As shown above,I should set RGB24 or GBR24 in uboot . I want lcd to VGA display connected with ch7055a .

If I set RGB24,About DISP0_DAT0~DISP0_DAT7 is R signal,About DISP0_DAT8~DISP0_DAT15 is G signal,

About DISP0_DAT16~DISP0_DAT23 is B signal. That's right or not.

Now as shown above connection diagram,I should how to set in Uboot environment variable.

Who can give me a help?

Thanks,

Leo

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Yuri
NXP Employee
NXP Employee

  Recommended IPU connections may be found in the i.MX6 Datasheet(s).
In particular, from Table 68 (Video Signal Cross-Reference) of IMX6DQCEC,

(Rev. 3, 02/2014) for 24-bit RGB :
IPU DATA[0-7]  are mapped to B[0-7]

IPU DATA[8-15] correspond G[0-7]

IPU DATA[16-23] correspond R[0-7]

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf 


In U-boot kernel command line IPU display parallel interface is named LCD

and is supported only as “CLAA WVGA LCD: RGB565”

  Our Linux porting guide for i.MX6 – alas – does not contain recommendations about

the IPU parallel interface. Nevertheless, You may refer to Chapter 17 (Supporting

the i.MX53 Reference Board DISP0 LCD) of the “i.MX53 System Development

User’s Guide”.

http://cache.freescale.com/files/32bit/doc/user_guide/MX53UG.pdf


Have a great day,
Yuri

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Yuri
NXP Employee
NXP Employee

  Recommended IPU connections may be found in the i.MX6 Datasheet(s).
In particular, from Table 68 (Video Signal Cross-Reference) of IMX6DQCEC,

(Rev. 3, 02/2014) for 24-bit RGB :
IPU DATA[0-7]  are mapped to B[0-7]

IPU DATA[8-15] correspond G[0-7]

IPU DATA[16-23] correspond R[0-7]

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf 


In U-boot kernel command line IPU display parallel interface is named LCD

and is supported only as “CLAA WVGA LCD: RGB565”

  Our Linux porting guide for i.MX6 – alas – does not contain recommendations about

the IPU parallel interface. Nevertheless, You may refer to Chapter 17 (Supporting

the i.MX53 Reference Board DISP0 LCD) of the “i.MX53 System Development

User’s Guide”.

http://cache.freescale.com/files/32bit/doc/user_guide/MX53UG.pdf


Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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mrleo
Contributor IV

Thanks very much!!

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