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i.MX6 ECSPI: MOSI and CS driven before transfer starts

Question asked by Florian Doerfler on Jul 8, 2015
Latest reply on Jul 12, 2015 by Florian Doerfler

Dear All

 

I have a problem with the behavior of ECSPI befor the start of a transfer and need a pointer where the problem could be. I did not find any clue in the manual that would explain what I am seeing.

 

First a little bit about my Setup:

I am using the i.MX6 ECSPI with a custom linux (3.0.35 Kernel) and the spidev interface. The internal Pull-Down is enabled for the MOSI pad. I tried both writing to the device file and sending through ioctl. I send 16 bit per word. It does not matter which SPI mode I use, I tried all.

 

My problem is the behavior of the MOSI pin before a transfer starts: The pin goes high for about the length of 3 clock cycles befor the actual transfer starts. Before the first clock, the pin goes to the correct level (depending on the data to be sent). The slave select signal is asserted during this time.

 

You can see the behavior in the attached image, the data sent is 0101111101011111, blue is MOSI, green is CLK, red is CS: CS goes low and MOSI goes high for some time, then MOSI goes low for the first bit and the clock starts:

 

ECSPI_mosi_clk_cs.jpg

 

So the question is:

Is this the expected behavior of the ECSPI block?

If not, what could be causing this behavior?

 

Best Regards

Florian Doerfler

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