MM912H634 low-side drivers issue

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MM912H634 low-side drivers issue

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daviddai
Contributor I

Hi,

 

I have a stange issue for MM912H634 low-side drivers test,

Firstly, I use  B_LSCR_LS1 and  B_LSCR_LS2 to control the relay with below code and 9V voltage,

Everything is ok, the relay can work as I expected.

 

    B_LSCEN = 0x05;

    D2DCTL0_D2DCLKDIV1 = 1;

    D2DCTL0_D2DCLKDIV0 = 1;

    D2DCTL1 = 0x8F;

    D2DCTL0_D2DEN = 1;

    B_WDR = 0b01000111;

    B_WDSR = 0xAA;

    for(;;)

    {

    B_LSCR_LS1 = 0;

    long_wait();

    B_LSCR_LS1 = 1;

    long_wait();

     

    B_LSCR_LS2 = 0;

    long_wait();

    B_LSCR_LS2 = 1;

    long_wait();

 

    _FEED_COP(); /* feeds the dog */

    }

 

Then, during the relay is working, I artificially simulated a voltage drop(9V --> 3.6V), relay stopped.

Strange issue happened, relay stopped forever, even I re-make the code and re-flash MCU, re-Power on,

I checked the MCU LSx rigister and found no change as below even I run Step over the code.

 

47573_47573.JPGCapture.JPG

I do not believe the haredware is destroyed.

Can you please tell me the possiable reason?

 

Thanks a lot!

 

 

Best Regards

David Dai

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RadekS
NXP Employee
NXP Employee

Hi David,

I suppose that it could have something to do with bg1p25sleep trimming at analog side.

Please try following recommended initialization procedure:

#define IOBYTE(address)    (*((volatile unsigned char*) (address)))

#define IOWORD(address)    (*((volatile unsigned int*) (address)))

#define TRIM0 IOBYTE(0x80C0)

#define TRIM1 IOBYTE(0x80C1)

#define TRIM2 IOBYTE(0x80C2)

#define TRIM3 IOBYTE(0x80C3)

  D2DCTL1  = 0x8F; // IRQ enable, max timeout

  D2DCTL0  = 0x80; // D2D enable, 4Bit, !Stop in Wait, D2DCLK=BUS

  D2DSTAT0 = 0x80;  // Clear D2D Errors

  MMCCTL1 = 0x01;

  B_CTR0 = TRIM0;

  B_CTR1 = TRIM1;

  B_CTR2 = TRIM2;

  B_CTR3 = TRIM3;

  B_CTR2 = 0x1E;

  MMCCTL1 = 0x00;

  B_LSCEN = 0x05;


I hope it helps you.

Have a great day,
RadekS

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RadekS
NXP Employee
NXP Employee

Hi David,

I suppose that it could have something to do with bg1p25sleep trimming at analog side.

Please try following recommended initialization procedure:

#define IOBYTE(address)    (*((volatile unsigned char*) (address)))

#define IOWORD(address)    (*((volatile unsigned int*) (address)))

#define TRIM0 IOBYTE(0x80C0)

#define TRIM1 IOBYTE(0x80C1)

#define TRIM2 IOBYTE(0x80C2)

#define TRIM3 IOBYTE(0x80C3)

  D2DCTL1  = 0x8F; // IRQ enable, max timeout

  D2DCTL0  = 0x80; // D2D enable, 4Bit, !Stop in Wait, D2DCLK=BUS

  D2DSTAT0 = 0x80;  // Clear D2D Errors

  MMCCTL1 = 0x01;

  B_CTR0 = TRIM0;

  B_CTR1 = TRIM1;

  B_CTR2 = TRIM2;

  B_CTR3 = TRIM3;

  B_CTR2 = 0x1E;

  MMCCTL1 = 0x00;

  B_LSCEN = 0x05;


I hope it helps you.

Have a great day,
RadekS

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daviddai
Contributor I

Hello RadekS,

Thanks for your help, I think I have to use much much time to read the MCU SPEC carefully!

Thanks!

Best Regards

David Dai

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RadekS
NXP Employee
NXP Employee

You are welcome.

If I understood correctly, it works now… Right?

Unfortunately, I am not sure if reading MCU SPEC will really help, in this case. I never thought that trimming value of internal reference could have any influence on low-side drivers. But it has. It is simply analog die and it needs set trimming values before use.

However I suppose that this issue with low-side drivers is described in errata:

http://www.freescale.com/files/analog/doc/errata/MM912_634ER.pdf

See “Unexpected setting of VROVC Bit and disabling of Low-side Driver(s) at VSUP Power On”

It seems that recommended loading values according reference manual is slightly different:

  B_CTR0 = TRIM0;

  B_CTR1 = TRIM1;

  B_CTR2 = TRIM2 & ~B_CTR2_SLPBG_LOCK_MASK;

  B_CTR2 |= B_CTR2_SLPBG_LOCK_MASK;

  B_CTR3 = TRIM3;

Errata recommend do not lock CTR2 values by lock mask as workaround

// B_CTR2 |= B_CTR2_SLPBG_LOCK_MASK;

In that case trimming values must be loaded at every MCU reset.

Note: I already met with similar issue and using template code from delivered CD helped me.

Code from my last reply is just copy-paste from this template code.


I hope it helps you.

Have a great day,
RadekS

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daviddai
Contributor I

Hello RadekS,

Yes, it works well.

Also I found the VROVC Bit is abnormal, it always is 1.

Now after adding the new code, it's ok.

Thanks a lot!

Best Regards

David Dai

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RadekS
NXP Employee
NXP Employee

Hi David,

You are welcome.

I branch your new question about True-Time Simullator to separate thread for better traceability:

https://community.freescale.com/thread/359003

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