I'm running a Linux 3.14.28 system on a custom iMX6DL board.
The system boots from an eMMC.
My Fuses are set a follows:
OCOTP_CFG4 <== 0x0000_5872
OCOTG_CFG5 <== 0x00100010
I need the ability to trigger a software reset. I do this by writing '0' to the WDOG1_WCR.SRS bit.
This causes the SoC to reset. But, after a ~4-5 seconds delay and the Serial Boot Loader starts (?!?!).
Looking at 184.108.40.206, it seems that if the boot flow fails, it falls back to the USB serial downloader.
I assume the eMMC should be reset when the CPU is reset. BOOT_CFG1 is set -- this should assert the SD_RST signal (which is connected on our PCB).
Any suggestions how to find out why resetting the CPU causes a fail with booting from eMMC?