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Crystal control clock on the 9s08QB processors

Question asked by D Etheredge on Jul 1, 2015
Latest reply on Jul 8, 2015 by David Diaz Marin

I previously posted abut this issue on the Crystal control clock on the 9s08QE processors and provided a solution there but that solution appears not to work correctly for the s08QB8 processors.


Using a 10 MHz XTAL, External Osc, FEE will work. RDIV= 3 ( div=256 ), Range=1, produces an accurate 39062.5 Hz Reference Clock. This results in a fixed frequency of 40,000,000 Hz from the FLL, and using BDIV=1 ( div by 2 ) produces a 20 MHz bus Clock.


With this frequency, the TPM can use the buss clock and achieve the desired accuracy and resolution.


Also, using a BDIV=0 can double the frequency but at a cost of higher dissipation.



When I do this with the QB8, I only get about a 5 MHz bus clock?

Using a 10 MHz xtal ( frequency verified on scope )


ICSSC=$FFAE + #$40

ICSC1=#$18   FLL selected, Ext Source, RDIV=256


This should produce a 40 Mhz Bus Clock



This should produce a 20 Mhz Bus Clock

Either way, The BDM reports 4.99 MHZ to a little over 5.01 MHz varies


Checking out using TPM:


TPMMOD= #$1 ( div by 2 )

TPMSC= #$8 ( Bus Clock used and by 1 )

TPM0SC = #$14 ( Toggle on OVFL )


Produces 1.25 MHz


Have I overlooked something? It works fine with the QE-32 ( actual values slightly different due to module version differences ).