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I am having trouble with a stand alone application for ls1021a writing to registers that are not 16-byte aligned in the pcie memory space (memory offset 0x03400000)

Question asked by Patrick Morrow on Jul 1, 2015
Latest reply on Jul 8, 2015 by Adrian Stoica

I am having trouble with a stand alone application built in codewarrior for ls1021a writing to registers that are not 16-byte aligned in the pcie memory space (memory offset 0x03400000), is there a setting or something that I am missing?  I am trying to set up ATU values and boundaries and such, and I can read non 16-byte aligned registers (for example 0x0340007C), but when I write modified values back to those registers, the address that gets modified is truncated to the previous 16-byte aligned memory offset (for example 0x03400070).  If I try to modify DRAM offsets (address 0x80000000), there seems to be no issue with writing to addresses that are not 16-byte aligned.

 

Any insight would be very much appreciated,

Patrick

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