AnsweredAssumed Answered

Floating-point division

Question asked by Dariusz Klibisz on Jul 1, 2015
Latest reply on Apr 25, 2019 by Jyothsna Rajan



I have some question regarding e200z4 core. I’m interested in floating-point operations and exceptions related to this operations, but the e200z4 core documentation is confusing in this regard. During division of floating point variables efsdiv assembler operation  is performed. E200z4 core documentation indicates that this operation is related to Embedded Floating-Point Unit. According to documentation FP bit in MSR register configures if:

0 - Floating-point unit is unavailable. The processor cannot execute floating-point instructions, including floating-point loads, stores, and moves. (An FP Unavailable interrupt will be generated on attempted execution of floating point instructions).

1 - Floating-point unit is available. The processor can execute floating-point instructions. (Note that for e200, the floating point unit is not supported, and an Unimplemented Operation exception will be generated for attempted execution of floating-point instructions when FP is set).

If MSR[FP] = 0, should division of floating points not be performed and “Floating-point unavailable” exception (IVOR7) should be generated or this bit matters only during attempts of execution of Book E floating point operations (efsdiv is not in Book E)?

Can e200z4 core perform division of double variables?


Best regards