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Changing the clock rate in FEE mode

Question asked by Eric Paljan on Jun 20, 2015
Latest reply on Jun 23, 2015 by Eric Paljan

Hallo community,

 

is it possible to change the core clock when I have already initialized it?

I have a MK10DX128 VLH7 that runs on 48 Mhz. Now I try to change the core clock by changing MCG_C4_DRST_DRS and MCG_C4_DMX32_MASK but it just change the DMX32. When I set DRS to 2 the mcu crashs.

 

Here is the source code I use:

 

 

static void clockSystem_init(void)

{

    uint32_t i;

   

    // Configure RTC

    SIM_SCGC6 |= SIM_SCGC6_RTC_MASK;    // Activate clock for RTC   

    RTC_CR = RTC_CR_SWR_MASK;            // Reset RTC registers

    RTC_CR = 0u;                            // No additional load capacitors, RTC is output to other peripherals

    RTC_CR |= RTC_CR_OSCE_MASK;            // Enable RTC oscillator

   

    // Wait for oscillator is stabilized --> TBD: Check and set correct value for this process

    for(i = 0u; i < 1000000ul; i++)

    {

        asm volatile ("nop");       

    }

   

    // Configure clock distribution and FLL

    SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(1);    // core/sys clock DIV = 1, bus clock DIV = 1, FlexBus clock DIV = 2, flash clock DIV = 2

    MCG_C1 = 0x00u;                                                        // FLL is output for MCGOUTCLK, external ref. is clock for FLL, set FLL input divider to 1

    MCG_C2 = 0x00u;                                                        // Set RANGE0 to 0 --> low frequency range crystal oscillator

    MCG_C7 |= MCG_C7_OSCSEL_MASK;                                        // Select RTC as external clock reference for MCG

    SIM_SOPT1 |= SIM_SOPT1_OSC32KSEL(2);                                // Select RTC as clock clock source for ERCLK32K --> LPTMR

    while(MCG_S & MCG_S_IREFST_MASK);                                    // Wait for reference clock to switch to external reference

    while( ((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0u );    // Wait for clock status bit to update

    MCG_C4 |= MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS(1);                    // Configure FLL for 48 MHz output

}

 

 

 

 

void changeSystemClock( uint8_t clockRate )

{

    bool_t dmx32 = 0;

    uint8_t drs = 0;

    switch(clockRate)

    {

    case 20:

        dmx32 = 0;

        drs = 0;

        break;

    case 24:

        dmx32 = 1;

        drs = 0;

        break;

    case 40:

        dmx32 = 0;

        drs = 1;

        break;

    case 48:

        dmx32 = 1;

        drs = 1;

        break;

    case 60:

        dmx32 = 0;

        drs = 2;

        break;

    case 72:

        dmx32 = 1;

        drs = 2;

        break;

    }

    // Configure new core clock

    if( dmx32 == 1 )

    {

        MCG_C4 |= MCG_C4_DMX32_MASK;

    }

    else

    {

        MCG_C4 &= ~(MCG_C4_DMX32_MASK);

    }

    MCG_C4 |= MCG_C4_DRST_DRS(drs);                    // Configure FLL

}

 

 

It would be nice when you can help me.

 

sincerelly yours

Eric

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