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Cannot set a frequency of 29.5 MHz for the LVDS clock signal on Yocto and LTIB

Question asked by charles huang on Jun 17, 2015
Latest reply on Jun 19, 2015 by gusarambula

When I set a frequency of 29.5 MHz for the PLL2 LVDS clock signal, I measure the value is always 38 MHz by oscilloscope.

1. I refer to the following URL, is it a feasible solution for Yocto 3.10.17.1.0.2?

    When other peripheral equipments reference to this LVDS clock, will they be affected?

    Reference URL: https://community.freescale.com/thread/306801

2. How to solve this issue for LTIB 4.1.0?

 

Thank you.

 

Best Regards,

Alex

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