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i.MX6DualLite PCIe bus clock question

Question asked by Kosta Godin on Jun 16, 2015
Latest reply on Jun 18, 2015 by Kosta Godin



A standard implementation of PCIe on i.mx6 is using IMX6QDL_CLK_SATA_REF_100M to drive ref_100m and pcie_bus clocks (the later via LVDS1) but i.MX6DualLite RM does not mention SATA clock - for example it is not available for LVDS source selection in CCM_ANALOG_MISC1 register on page 917. i.MX6Dual RM describes this clock but it seems to be removed from i.MX6DualLite RM, probably because DualLite does not support SATA.

Is it still possible to use this SATA clock on i.MX6DualLite for PCIe?