Our customer use Vybrid5R (SVF522R3K1CMK4) analog video input (VADCSE0) to terminal
enter the NTSC video signal to display an image on the TFT.
The detection of input signal use the registers of "havesignal" of Bit 0 , describe on Vybrid_Reference_Manual _-_ R_Series_ (Auto) _-_ Rev_6.pdf
of sect 61.6.22 Video Mode (VDEC_VIDMOD).
Would you please tell me the conditions to become havesignal is "0" when it becomes to video signal is fail.
Max input voltage and minimum input voltage.
Or Example) When input signal is ** V more voltage is applied, fail register rises.
The voltage input of up to ** V ~ ** V, the screen disturbed ,but does not rise fail to register.