I’m currently working on an electronic board based on the P1010. I’m trying to use global timers on the P1010 but I have been unable to get A0 and B0 global timers working. Indeed, timer interruptions don't cause external interrupts.
You could find below more explanations about what I have done so far.
Concerning the initialization of the processor, I have set two main things :
- Initialize MSR register by setting the MSR[EE] bit to 0 (wrteei 0)
- Initialize the IRQ module :
- Reset PIC writing RST bit to 1
- Clear CTPR register
- Clear all pending interrupts reading IACK and writing EOI
- Set PIC operating mode equals to Mixed mode (interrupts are handled by the normal priority and delivery mechanisms of the PIC)
- Enable global interrupts changing MSR[EE] bit to 1 (wrteei 1)
After having got the timer configuration register reference (CCSRBAR address + 40000h + 1100h for A0 Global timer and CCSRBAR address + 40000h + 2100h for B0 Global timer), I have :
- Set internal interrupt destination register to 1 of the PIC_GTDRA0/B0 register in order to direct timer interrupts to processor core
- Specified the interrupt priority to 1 and set the vector field of the PIC_GTVPRA0/B0 register
- Enabled counting and set the base count of the PIC_GTBCRA0/B0 register
Before the initialization of the A0 Global timer :
After initialization :
At runtime :
The global timers seem to work since I can see the PIC_GTCCRA0 register values decrementing. Reading the P1010 QorIQ Integrated Processor Reference Manual, it mentions that the PIC_GTCCRA0[TOG] is toggled when the current count decrements to zero and cleared when PIC_GTBCRA0[CI] goes from 1 to 0. However, the CI bit is always set to 1 and doesn’t change at all.
Looking at the PIC_GTVPRA0 register, I have noticed that the Activity bit is always set to 1 and interrupt request from the PIC should cause the processor to take an external interrupt, right ?
Is there any additional register/step needed to setup and use global timers? Anyone can explain me in details how they work?