We currently have the following technical issue:
Problematic: according to Safety Considerations S12G-Family Rev.0 7/2012 , Chapter 6.1 Program Flash and EEPROM, in "ECC Logic not working" paragraph, it is stated that the ECC Logic may be tested by programming a carefully choosen pattern combination. In the same paragraph we have an example of "producing" an 1 bit error. For our application we need a pattern example that covers the case of the 2 bits errors. The purpose is to test the ECC Logic during application startup with a controlled uncorrectable 2 bits error. By reading the respectively prepared pattern, we would determin if the detection of the 2 bits errors is working properly before continue execution.
Question: Is anybody able to provide such pattern combination to generate a 2 bit error in the Program Flash?