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About LVDS AC parameter in i.MX6DQ.

Question asked by Keita Nagashima on May 28, 2015
Latest reply on Jun 4, 2015 by Keita Nagashima

Dear All,

 

Hello.

Refer to "Table 31. I/O AC Parameters of LVDS Pad" in IMX6DQAEC_Rev.3.

 

[Q1]

What does "Operating Frequency" parameter meaning?

(The parameter is Serializer clock, isn't it?)

 

[Q2]

Next, refer to Table 39-4. LDB Clock Sources in IMX6DQRM(Rev.2).

- interface serializer clock : Up to 595 MHz

 

Why is the max value "800MHz" in I/O AC Parameters of LVDS Pad?

Or, why is minimal value a blank?

 

[Q3]

Refer to "Table 39-2. LDB IP Parametric Table" in IMX6DQRM(Rev.2).

- IPU_DI0_CLK, IPU_DI1_CLK- Display interface clock: 20-170 MHz

- DI0_SERIAL_CLK, DI1_SERIAL_CLK - Serializer clock: 140-595 MHz

 

I consider that if one use the Dual channel mode, Serializer clock will be below formula.

• Dual Channel configuration

- Pixel clock: up to 170 MHz

- LVDS Clock frequency = Pixel clock x 7/2 = 170*7/2 = 595MHz

--> In case of Display interface clock: 20MHz, LVDS Clock frequency = 20MHz x 7/2 = 70MHz

 

So, I think that below spec is correct.

- DI0_SERIAL_CLK, DI1_SERIAL_CLK - Serializer clock: 70-595 MHz

 

Best Regards,

Keita

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