We are working on device which needs to receive data which is similar to camera data (Still images type). We have analogues signals to VSYNC, HSYNC and Pixel Clock. Also we have a 8-bit data bus. Currently we are in the process of evaluating the iMX6Q processor for the application. We are using a SABRE-SD for Smart Devices reference board for our testing.
We believe that we can use the CSI-Parallel interface for this task. I believe we need to configure the IPU as follows for the task,
Logical data path: CSI to MEM
Pixel Format: Generic
Clock mode: Gated
Currently we are referring the following documents for the testing,
- i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 2, 06/2014
- i.MX 6Solo/6DualLite Linux Reference Manual, Rev. L3.0.35_4.1.0, 09/2013
Question #1: We would like to know what are the main configurations we need to do in order to configure the IPU to do CSI->MEM transfer of 8-bit data.
The other issue that we are seeing with this approach relates to the frame sizes. According to the Section 184.108.40.206 Sensor Image Frame Relations we need to configure the size of the images in internal registers prior to image capture. This is correct for normal images. But in our application we won't know the data size (ie. the image length and width) prior to the data capture. So the image size is entirely upto the clock signals. We need to perform the data capture as follows,
- Start the image when there is a pulse in VSYNC signal
- Each line will start with a HSYNC signal
- Capture data based on the PIXEL_CLOCK until the next HSYNC comes
- Repeat the Step2 and Step3 until the image completion signal comes.
We were wandering whether we can give the image completion interrupt using the End of Line interrupt in CPMEM. There should be an interrupt which says end of image (could not find yet), if there is one I think we should be able to trigger it using software.
Question #2: Could you provide any thoughts on this? Do you all think that this is possible?