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question for the release.S u-boot code

Question asked by H VO on May 27, 2015
Latest reply on Jun 11, 2015 by H VO

in this section of code:

"Coming here, we know the cpu has one TLB mapping in TLB1[0] which maps 0xfffff000-0xffffffff one-to-one.  We set up a second mapping that maps addr 1:1 for 64M, and then we jump to addr"

lis r10,(MAS0_TBLSEL(1)|MAS0_ESEL(0))@h

mtspr SPRN_MAS0,r10

 

does it look like it's setting up entry 0 in TLB1 for the 1:1 mapping?  But isn't entry 0 in TLB1 already used for the 4KB boot page (0xfffff000-0xffffffff)?

 

thanks!

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