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Control Module

Question asked by Takashi Takahashi on May 25, 2015
Latest reply on Aug 10, 2015 by gusarambula

Hi community.


In reference to the 37.4.12 Control Module of IMX6DQRM, we would like to 6 of the following processing in the IPU.

Please allowed to check whether simultaneous processing can be established by IDMAC.


1, camera 2 input data stored in DRAM

IPU1 CSI0 (via CSI, YUV422 8-bit) using IPU2 CSI1 (via MIPI-CSI, YUV422 16 bit).

2, de-interlacing of the camera image (VDIC)

※ MIPI-CSI input can not On-the-fly processing.

3, IPU2 of the camera image in order to execute the image recognition processing in the ARM CA9, there is a possibility of image magnification conversion in IPU2. (IC?)

4,IPU1 of camera image of YUV → RGB conversion (IC or DP)

5,overlays HMI + guide lines generated by the GPU and a IPU1 camera picture (IPU 2 images based on image recognition processing) (DP)

6,LVDS output via LDB

camera image is 720 * 480 30fps.