our board is designed base on SDB, and android os is 4.4.2.
our wifi moudle use SDIO, the SDIO clock need 10~20M, i know the default SDIO Clock is 50M, so we try to reduce the clock to 10~20M, we change kernel_imx/arch/arm/mach-mx6/clock.c
static int _clk_usdhc3_set_rate(struct clk *clk, unsigned long rate)
u32 reg, div;
u32 parent_rate = clk_get_rate(clk->parent);
div = parent_rate / rate;
printk(KERN_ERR "++++++++++++++++++++++++++++++++++usdhc3 div is \n",div);
if (div == 0)
if (((parent_rate / div) != rate) || (div > 8))
reg = __raw_readl(MXC_CCM_CSCDR1);
reg &= ~MXC_CCM_CSCDR1_USDHC3_PODF_MASK;
reg |= (4 - 1) << MXC_CCM_CSCDR1_USDHC3_PODF_OFFSET;
//reg |= (div - 1) << MXC_CCM_CSCDR1_USDHC3_PODF_OFFSET;
this change is right???