t1040: I2C bus busy error

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

t1040: I2C bus busy error

1,761 Views
chandrashekhar
Contributor III

Hi Freescale Team,

We are encountering random i2c bus busy error while transaction on different i2c slave devices connected to t1040 . We captured the i2c transaction snapshot for error condition and it shows i2c clock  is not toggling after start condition.

i2c-fail.jpg

Is there any errata available which we need to take care?

Regards,

Chandra

Tags (2)
0 Kudos
3 Replies

945 Views
Pavel
NXP Employee
NXP Employee

It looks like that some I2C slave generates START condition on the I2C bus. See the right side of your oscilloscope screen. The T1040 I2C detects this START condition, set the I2Cx_I2CSR[MBB] bit and wait STOP condition on the I2C bus.

There is no STOP condition on the right side of your oscilloscope screen.

It looks like that some I2C slave generates START condition on the I2C bus.


Have a great day,
Pavel

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos

945 Views
chandrashekhar
Contributor III

Hi Pavel,

In the snapshot, yellow signal is clock and green one is data. So, we could see start and stop signal but there is no data transaction in between. May I know how much time it takes to set MBB bit after generation of start bit? Also, what is the latency for MBB bit to reset after stop bit?

Regards,

Chandra

0 Kudos

945 Views
Pavel
NXP Employee
NXP Employee

The I2C START condition:

A HIGH to LOW transition on the SDA line while SCL is HIGH.

The I2C STOP condition:

A LOW to HIGH transition on the SDA line while SCL is HIGH

There is only START condition on the right side on your oscilloscope screen.

Delay for setting and clearing MBB bit is depends on the platform clock and I2C filter rate.

0 Kudos