Hi,
I'm developing on a custom i.MX6Q-Board and we want to use a 2-Channel LPDDR2 configuration with two Micron MT42L128M32D1TK chips (512MB per chip).
But I'm nearly running mad with this because either u-boot shows only the half size of the RAM, crashes at RAM-calculation or doesn't even start. Oh, and I forgot the fourth case: I can even start Linux and everything tells me that the system now has 1GB, but I can't believe that because my system crashes when I test the RAM with
[CODE]
memtester 300 1
[/CODE]
I also think this is the reason why I can see the login-screen, but X-Server crashes when I try to login.
Short summary of my environment:
Debugger: Trace32
Bootloader: U-Boot 2015.01
Boot-Device: SD-Card
Linux: 3.19
Distribution: Debian 8
I hope, the connections between CPU and RAM are OK. I attached the schematic in a pdf-file.
I used the LPDDR2 Script Aid to get a somehow working configuration. I think everything is adjusted correctly, but if I use it the way it is now configured, U-Boot and Linux tell me that there are only 512MB RAM.
I also tried to set "Number of Chip Selects used per Channel" to 2, but this already crashes at boot of u-boot.
The resulting .cfg-file is sie_mx6q_ScriptAid.cfg.
I tried to configure a .cfg-file for U-Boot by my own. With this, the i.MX6 "thinks" it has 1GB of Memory and even boots to Login-Screen, but crashes on memtester (see above).
My own try is in sie_mx6q.cfg.
What am I doing wrong? Or what didn't I understood?
Do you need further information?
Original Attachment has been moved to: sie_mx6q.cfg.zip
Original Attachment has been moved to: sie_mx6q-ScriptAid.cfg.zip
YESSSSS, I DID IT!!!!!!! IT WORKS!!!!!!
This is how I solved my problem:
1. I had to activate the GPIOs to override the Fuses on 0x450 by setting BOOT_MODE to '01' (not really nessesary but helpful to play with fuses).
Note to me: I think BOOT_MODE '10' is better for my purposes -> test it later.
2. Set "DDR Memory Map default config" in BOOT_CFG3 to '10' with the now active GPIOs. This activates interleaving mode for LPDDR2 to achieve a continous memory.
3. Change the Script-Aid:
The memory doesn't have two chip-selects. Although there are two CS-Pins, only one is active!
Activate Interleaving mode
4. Change RAM-Size calculation in board specific C-File for U-Boot: The function "imx_ddr_size()" ignores two-channel-mode. So you have to set:
gd->ram_size = (imx_ddr_size()*2); //imx_ddr_size() ignores two channel mode. So double the size here! (!!!!!quick and dirty code!!!!!)
5. In device tree set the memory to a start-address of 0x10000000 (Base Address of MMDC0) and the range to 0x40000000 (1GiB).
As I remember, this was all I had to do.
I hope this helps someone else, too.
Thanks