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About EIM Bus Timing Parameters in i.MX6DQ.

Question asked by Keita Nagashima on May 11, 2015
Latest reply on Jun 8, 2015 by ClayTurner

Dear All,

 

I have questions about EIM Bus Timing Parameters in i.MX6DQ.

 

[Q1]

Refer to Table 40. EIM Bus Timing Parameters in IMX6SDLAEC(Rev.4).

There are both spec (min & max) in WE4~WE17.

 

On the other hand, refer to Table 41. EIM Bus Timing Parameters in IMX6DQAEC(Rev.3).

There aren't both spec (min & max) in WE4~WE17.

 

Why does i.MX6DQ have only the specification of the one (min or max)?

 

[Q2]

Refer to Table 41. EIM Asynchronous Timing Parameters Relative to Chip Select in IMX6DQAEC(Rev.3)

"WE31" : WE4 - WE6 - CSA  (Max : 3 - CSA)

If current data sheet of i.MX6DQ is right, we cannot calculate the max value from "WE4 - WE6 - CSA".

Because WE4 and WE6 hasn't min spec.

How should I think?

 

Best Regards,

Keita

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