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IMX6 SSI clock for I2S Mode

Question asked by Sriram Periyasamy on May 6, 2015
Latest reply on May 6, 2015 by Sriram Periyasamy

Hi All,


I am using the SSI1 as I2S master and configured the registers as per the Reference manual for SABRESD AndroidKK4.4.2.


for 2 channel, 48KHz, 16 bit depth audio data,


  SSI1 clock -> 12.288 MHz derived from Audio PLL4 ( 688.128 )


enabled the network clock as follows,


snd_soc_dai_set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0 , SND_SOC_CLOCK_OUT);


And the dividers are as follows


WL - 7 ( 16 bit )

DC - 1 ( 1 frame )

PM - 3

DIV2 - 0

PSR - 0


And dumped the register for above values. Still i am not getting proper Bit clock 1.5 Mhz in clock line.

I am getting ~6 MHz in clock line.


Can anyone please help me that what i am missing in the configuration.

Your help will be grateful.


Thanks and Regards,