We are using a 16Mhz crystal on a K20dx256 and I think it is upscaled to 96Mhz. We use the system clock with the PIT timer to measure a signal coming in on FTM0. The counts in the PIT are used to drive an output slightly scaled from the incoming signal. All this works, now I need to know the exact period of the PIT clock so we can do another calculation. I believe the clock is set to divide the system clock down by 8 but when I generate a signal on an output pin that I toggle when the PIT is loaded with 1000 counts I get 24kz. As far as I can see the numbers don't work. I am wondering if the bus clock isn't really running at 96Mhz/2 = 48 Mhz.
Is there any way to determine the period of the PIT clock exactly? I was hoping MQX had such a mechanism or if anyone could suggest a way to determine the PIT clock exactly.
Thanks for any advice,