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Need to know more about IPUv3 with respect to i.MX6Q

Question asked by ajithpv on Apr 21, 2015
Latest reply on Jun 25, 2015 by ajithpv
Branched to a new discussion

Hi All,

As part of an IPU, GPU and Display related activity, I'm going through the following documents

  1. IMX6DQRM.pdf - i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 2, 06/2014
  2. FTF-CON-F0119.pdf - A Deep Dive into Image Processing for i.MX6 Application Processors

I'm using i.MX6Q SABRE SDP platform with Linux kernel 3.10.17 Yocto BSP.


With respect to the above documents and platform, please see my REQUIREMENT following by DOUBTS below:



Basically my intention is to draw couple of lines (say 1000 lines) using GPU2D module only. This lines I have to give to IPU blocks via 7 planes (virtual screen). Finally these planes will combine and shows the result on a single display.

The 7 planes (virtual screen) combination shall done based on the "1x7 plane" feature which supported by the IPUv3 in-built to the i.MX6Q (as mentioned in below snapshot).


Each virtual screen shall have the same pixel number, drawing buffer in color format and the inherent depth as the real screen (final display).The display port will be either set to LVDS or HDMI. The maximum supported display resolution shall be 1366x768. The pixel should be of the format RGB565.

Each drawing plane shall managed by "double buffer" mechanism in order to suppress the tearing effect during drawing process.


  1. In-order to support the Double buffering, I came to know that, I can use the following command:
    $ export FB_MULTI_BUFFER=2
    Whether the above command will make all the 7 planes (virtual buffers) into double buffering mode? If no, then how to set double buffering for all these 7 planes?
  2. In-order to achieve the "Example 2: 1x7 planes" (as mentioned in above snapshot), I have selected the following IPU main flows and IDMAC channels (with respect to graphical drawing) from IMX6DQRM.pdf :
    • MEM-->VDIC-->IC(PRP VF)-->MEM , where VideoIn = IDMAC_CH_25/26; OtherIn=14; Output IDMAC = 21.
      I assume this will take 2 graphical planes (in which the line drawing are present) from the IDMAC and combine it in VDIC. The result will pass into IC and it will then again combine it with another plane and give the result back to IDMAC (or DMFC).
    • MEM-->DPSYNC(BG/FG), where VideoIn = IDMAC_CH_23; OtherIn = 27; Output IDMAC = None.
      I assume this channel will take the above result from IDMAC and then it combine with another plane (which also have line drawing) and result give into DC-->DI--> Display.

      I would like to know whether above channel configurations are correct. Could you please share the settings which required for "Example 2: 1x7 planes" (for drawing task with on-the-fly combine), if this configuration is not correct.
    • For CSI --> VDIC – There is no channel setting mentioned for combining in VDIC, if the input is coming from CSI. Could you please tell me, how I can configure this connection in-order to achieve "Example 2: 1x7 planes"?
    • For DI --> CSI – There is no IDMAC channel setting available for connecting the DI output to the CSI input. Could you please tell me, how I can configure this connection in-order to achieve "Example 2: 1x7 planes"?
  3. The reference manual (IMX6DQRM.pdf) given plenty of channel configuration but when I look into the Linux source - "include/linux/ipu-v3.h" - I have seen only a few channels are mentioned. Whether only these channels are supported in the i.MX6Q SabreSDP? How I can add new channels here?
  4. There details about the GPU2D core in the IMX6DQRM.pdf is not enough for understanding the GPU core. I would like to know from where I will get the "Register details/ detailed reference manual" for the Vivante GPU2D core which used in i.MX6Q processor?

Looking forward to your reply...


Thank you in advance,

Ajith P V