I have been diagnosing some sporadic failures on a processor board with an MPC875. The system is supposed to come up with a 50MHz SYSCLK. However, on at least one bad unit, the SYSCLK is starting up while the 3.3V power is still ramping up. There is a power-on reset chip that I can see is holding PORESET low (except perhaps for a tiny glitch while the 3.3V is down below 0.5V). The SYSCLK starts up when VCC is about 2.0V (still heading to 3.3V). The PORESET is still low for 200msec while this is happening. The MODCK signals aren't correct this early, so the system is coming up at 5MHz instead of 50MHz. The SYSCLK does appear to stop after a short period (probably 512 cycles), then when PORESET is finally released, SYSCLK starts again, and it is still at 5.0MHz rather than 50MHz. The clocking is done via a 10MHz oscillator going into EXTCLK. MODCK is supposed to be read as 1,1.
Does this seem like a bad MPC875, or am I missing something?
Will the MPC875 resample the MODCK signals on a second PORESET event, or are they locked into whatever the processor sampled on the initial erroneous event?