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i.MX6 grouped PLL.

Question asked by Satoshi Shimoda on Apr 6, 2015
Latest reply on Apr 6, 2015 by igorpadykov

Hi community,

 

I have a question about i.MX6DQ PLL.

Please see chapter 18.7 in IMX6DQRM Rev.2, it says as below.

"The registers which have the same description are grouped within {}."

 

Then, would you let me know why the registers are grouped?

And would you let me know the role of each registers in the group?

(e.g. CCM_ANALOG_PLL_xxx_SET is for PLL enable, CCM_ANALOG_PLL_xxx_cler is for PLL disable,e etc...)

 

 

Best Regards,

Satoshi Shimoda

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