Hi community,
I have a question about i.MX6DQ PLL.
Please see chapter 18.7 in IMX6DQRM Rev.2, it says as below.
"The registers which have the same description are grouped within {}."
Then, would you let me know why the registers are grouped?
And would you let me know the role of each registers in the group?
(e.g. CCM_ANALOG_PLL_xxx_SET is for PLL enable, CCM_ANALOG_PLL_xxx_cler is for PLL disable,e etc...)
Best Regards,
Satoshi Shimoda
Solved! Go to Solution.
Hi Satoshi
registers descriptions are grouped since they have the same
meaning and for reducing document size.
Explanation of _SET, _CLR,_TOG can be found in
sect.39.2 Naming Convention IMX23RM
and they allow for bits manipulation.
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Hi Satoshi
registers descriptions are grouped since they have the same
meaning and for reducing document size.
Explanation of _SET, _CLR,_TOG can be found in
sect.39.2 Naming Convention IMX23RM
and they allow for bits manipulation.
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------